A High Speed Vlsi Architecture For Image Compression Using Manchester

K. Venkata Nagarjuna Reddy, T.Prasad Babu


The research community have the significant attention in the field of approximate computing in the over few years, mainly in the context of several signal processing applications. In computing, the image and video compression algorithms like MPEG and JPEG are especially important. Therefore, due to the imperceptibility of human, they are tolerant of imprecision of computing that can be utilized for achieving highly power efficient implementations on these algorithms. We suggested a reconfigurable inexact architecture for MPEG encoders. Its main objective is to maintain a specific Peak Signal to Noise Ratio (PSNR) threshold for any video. On the basis of characteristics of each unique video we propose two heuristics for tuning the approximate degree of RAB in these two modules during runtime. An experimental result achieves a 30% saving of power over a conventional architecture of MPEG encoder. The presented reconfigurable architecture for the MPEG encoder can be simply expanded to other applications of DSP.

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